From 6a18e3aa833b4b794cd13d01957a32cf494073fb Mon Sep 17 00:00:00 2001 From: Pol Henarejos Date: Mon, 25 Nov 2024 12:54:57 +0100 Subject: [PATCH] Add CCID SET_DATA_RATE_AND_CLOCK command. Signed-off-by: Pol Henarejos --- src/usb/ccid/ccid.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/src/usb/ccid/ccid.c b/src/usb/ccid/ccid.c index fc51996..8decaaf 100644 --- a/src/usb/ccid/ccid.c +++ b/src/usb/ccid/ccid.c @@ -48,6 +48,8 @@ #define CCID_DATA_BLOCK_RET 0x80 #define CCID_SLOT_STATUS_RET 0x81 /* non-ICCD result */ #define CCID_PARAMS_RET 0x82 /* non-ICCD result */ +#define CCID_SETDATARATEANDCLOCKFREQUENCY 0x73 +#define CCID_SETDATARATEANDCLOCKFREQUENCY_RET 0x84 #define CCID_MSG_SEQ_OFFSET 6 #define CCID_MSG_STATUS_OFFSET 7 @@ -258,6 +260,16 @@ int driver_process_usb_packet_ccid(uint8_t itf, uint16_t rx_read) { memcpy(&ccid_resp_fast[itf]->apdu, params, sizeof(params)); ccid_write_fast(itf, (const uint8_t *)ccid_resp_fast[itf], sizeof(params) + 10); } + else if (ccid_header[itf]->bMessageType == CCID_SETDATARATEANDCLOCKFREQUENCY) { + ccid_resp_fast[itf]->bMessageType = CCID_SETDATARATEANDCLOCKFREQUENCY_RET; + ccid_resp_fast[itf]->dwLength = 8; + ccid_resp_fast[itf]->bSlot = 0; + ccid_resp_fast[itf]->bSeq = ccid_header[itf]->bSeq; + ccid_resp_fast[itf]->abRFU0 = ccid_status; + ccid_resp_fast[itf]->abRFU1 = 0; + memset(&ccid_resp_fast[itf]->apdu, 0, 8); + ccid_write_fast(itf, (const uint8_t *)ccid_resp_fast[itf], 18); + } else if (ccid_header[itf]->bMessageType == CCID_XFR_BLOCK) { apdu.rdata = &ccid_response[itf]->apdu; apdu_sent = apdu_process(itf, &ccid_header[itf]->apdu, (uint16_t)ccid_header[itf]->dwLength);